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24LC08B-I/P
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24LC08B-I/P Anwendungshinweis - Microchip

  • Hersteller:
    Microchip
  • Kategorie:
    EEPROM IC Chip
  • Fallpaket
    PDIP-8
  • Beschreibung:
    MICROCHIP 24LC08B-I/P EEPROM, I2C, 8Kbit, 4 BLK (256K x 8Bit), 400kHz, DIP, 8Pins
Aktualisierte Uhrzeit: 2025-06-18 04:00:29 (UTC+8)

24LC08B-I/P Anwendungshinweis

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© 2008 Microchip Technology Inc. DS01190A-page 1
AN1190
INTRODUCTION
The 24XXX series serial EEPROMs from Microchip
Technology support a bidirectional, 2-wire bus and data
transmission protocol. The bus is controlled by the
microcontroller (master), which generates the Serial
Clock (SCL), controls the bus access and generates
the Start and Stop conditions, while the 24XXX serial
EEPROM works as slave. The 24XXX serial
EEPROMs are I
2
C™
compatible and have maximum
clock frequencies ranging from 100 kHz to 1 MHz.
The main features of the 24XXX serial EEPROMs are:
2-wire serial interface bus, I
2
C compatible
EEPROM densities from 128 bits to 512 Kbits
Bus speed from 100 kHz to 1 MHz
Voltage range from 1.7V to 5.5V
Low power operation
Temperature range from -40°C to +125°C
Over 1,000,000 erase/write cycles
Up to 8 devices may be connected to same bus
This application note is part of a series that provide
source code to help the user implement the protocol
with minimal effort.
Figure 1 is the hardware schematic depicting the
interface between the Microchip 24XXX series of I
2
C
serial EEPROMs and NXP’s P89LPC952 8051-based
MCU. The schematic shows the connections
necessary between the MCU and the serial EEPROM
as tested, as well as the required pull-up resistors on
the clock line (SCL) and data line (SDA). Not illustrated
in this application note are the write-protect feature and
the cascading of multiple devices; thus, the WP pin and
address pins A0, A1 and A2 are tied to V
SS (ground).
The test software was written assuming these
connections.
FIGURE 1: CIRCUIT FOR P89LPC952 MCU AND 24XXX SERIES I
2
C SERIAL EEPROM
Author: Alexandru Valeanu
Microchip Technology Inc.
7
8
6
5
1
2
3
4
A0
A1
A2
Vss
Vcc
WP
SCL
SDA
P1.2
T0
/SCL
P1.3 INT0
/SDA
Vcc
(1)
7
8
P89LPC952
24XX512
Note 1: A decoupling capacitor (typically 0.1 µF) should be used to filter noise on VCC.
Note 2: A pull-up resistor on SCL and SDA is recommended to ensure bus idle during power-up.
4.7 k
Ω
(2)
Using ASM and a Hardware Module to Interface
8051 MCUs with I
2
C™ Serial EEPROMs

24LC08B-I/P Datenblatt-PDF

24LC08B-I/P Datenblatt PDF
Microchip
40 Seiten, 1105 KB
24LC08B-I/P Benutzerreferenzhandbuch
Microchip
8 Seiten, 108 KB
24LC08B-I/P Anderes Datenblatt
Microchip
48 Seiten, 1082 KB
24LC08B-I/P Anwendungshinweis
Microchip
14 Seiten, 262 KB
24LC08B-I/P Notizdatei
Microchip
2 Seiten, 111 KB
24LC08B-I/P Andere Referenzen
Microchip
1 Seiten, 119 KB

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