herunterladen
AFT09MS007NT1
1
RF Device Data
Freescale Semiconductor, Inc.
RF Power LDMOS Transistor
High Ruggedness N--Channel
Enhancement--Mode Lateral MOSFET
Designed for handheld two -- way r adio applications with frequencies from
136 to 941 MHz. The high gain, ruggedness and wideband performance of this
device makes it ideal for large--signal, common--source amplifier applications
in handheld radio equipment.
Narrowband Performance
(7.5 Vdc, I
DQ
= 100 mA, T
A
=25C, CW)
Frequency
(MHz)
G
ps
(dB)
D
(%)
P
out
(W)
870
(1)
15.2 71.0 7.3
Wideband Performance (7.5 Vdc, T
A
=25C, CW)
Frequency
(MHz)
P
in
(W)
G
ps
(dB)
D
(%)
P
out
(W)
136–174 0.25 14.6 69.0 7.2
350–470
(2,5)
0.20 15.6 60.9 7.3
450–520
(3,5)
0.22 15.4 56.0 7.5
760–860
(4,5)
0.23 15.1 48.1 7.5
Load Mismatch/Ruggedness
Frequency
(MHz)
Signal
Type
VSWR
P
in
(W)
Test
Voltage
Result
870
(1)
CW > 65:1 at all
Phase Angles
0.4
(3 dB Overdrive)
10.8 No Device
Degradation
1. Measured in 870 MHz narrowband test circuit.
2. Measured in 350–470 MHz UHF broadband reference circuit.
3. Measured in 450–520 MHz UHF broadband reference circuit.
4. Measured in 760–860 MHz UHF broadband reference circuit.
5. The values shown are the minimum measured performance numbers across the
indicated frequency range.
Features
Characterized for Operation from 136 to 941 MHz
Unmatched Input and Output Allowing Wide Frequency Range Utilization
Integrated ESD Protection
Integrated Stability Enhancements
Wideband — Full Power Across the Band
Exceptional Thermal Performance
Extreme Ruggedness
High Linearity for: TETRA, SSB
In Tape and Reel. T1 Suffix = 1,000 Units, 16 mm Tape Width, 7--inch Reel.
Typical Applications
Output Stage VHF Band Handheld Radio
Output Stage UHF Band Handheld Radio
Output Stage for 700–800 MHz Handheld Radio
Document Number: AFT09MS007N
Rev. 1, 4/2014
Freescale Semiconductor
Technical Data
136–941 MHz, 7 W, 7.5 V
WIDEBAND
RF POWER LDMOS TRANSISTOR
AFT09MS007NT1
PLD--1.5W
Note: The center pad on the backside of
the package is the source terminal
for the transistor.
Figure 1. Pin Connections
DrainGate
Freescale Semiconductor, Inc., 2013–2014.
A
ll rights reserved.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 1
- ・ Abmessungen des Paketumrisses on Seite 24
- ・ Paket-Footprint-Pad-Layout on Seite 23
- ・ Markierungsinformationen on Seite 23
- ・ Blockdiagramm on Seite 6 Seite 10 Seite 15 Seite 20
- ・ Typisches Anwendungsschaltbild on Seite 1
- ・ Technische Daten on Seite 1
- ・ Anwendungsbereich on Seite 1
- ・ Elektrische Spezifikation on Seite 2 Seite 3
