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SNLA266–January 2016
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Copyright © 2016, Texas Instruments Incorporated
DP83822 IEEE 802.3u Compliance and Debug
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Application Report
SNLA266–January 2016
DP83822 IEEE 802.3u Compliance and Debug
Yue Cai, Ross Pimentel
ABSTRACT
The DP83822 was designed to meet the needs of rugged and high performance applications while still
maintaining strict adherence to the IEEE 802.3u standard. This application note will discuss how to
configure the DP83822 for various Ethernet compliance tests, identify common system level mistakes and
present solutions to those mistakes to ensure compliance.
Contents
1 Introduction ................................................................................................................... 2
2 Standards and System Requirements .................................................................................... 3
3 Ethernet Physical Layer Compliance Testing............................................................................ 4
4 Debug Test Methods ........................................................................................................ 9
Appendix A IEEE802.3u Compliance Testing Scripts for the DP83822 .................................................. 12
Appendix B Loopback and BIST Mode Scripts for the DP83822.......................................................... 13
Appendix C PHY Test Mode Waveforms ..................................................................................... 16
Appendix D TI’s USB-2-MDIO Tool............................................................................................ 20
List of Figures
1 DP83822 EVM Connected to a Testing Fixture ......................................................................... 4
2 Loopback Test Modes....................................................................................................... 9
3 Analog Loopback Terminations .......................................................................................... 10
4 Loopback Cable ............................................................................................................ 10
5 100BASE-TX Template .................................................................................................... 16
6 100BASE-TX Differential Output Voltage (Negative).................................................................. 16
7 100BASE-TX Fall Time.................................................................................................... 17
8 100BASE-TX Rise Time................................................................................................... 17
9 100BASE-TX Duty Cycle Distortion...................................................................................... 18
10 100BASE-TX Jitter......................................................................................................... 18
11 100BASE-TX Waveform Overshoot ..................................................................................... 19
12 10BASE-Te Link Pulse .................................................................................................... 19
13 DP83822 EVM Connected to a MSP430F5 ............................................................................ 20
List of Tables
1 Terminology .................................................................................................................. 2
