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EP2AGX190FF35C4 Anwendungshinweis - Altera

  • Hersteller:
    Altera
  • Kategorie:
    FPGA Chip
  • Fallpaket
    FBGA-1152
  • Beschreibung:
    FPGA Arria II GX Family 181165 Cells 500MHz 40nm Technology 0.9V 1152Pin FC-FBGA
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EP2AGX190FF35C4 Anwendungshinweis

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Application Report
SPRA633C September 2008
TMS320C620x/C642x McBSP: UART
Todd Hiers ......................................................................................................................................
ABSTRACT
This document describes how to use the multichannel buffered serial port (McBSP) in
the Texas Instruments (TI) TMS320C6000™ ( C6000™) digital signal processors (DSP)
to interface to a universal asynchronous receiver/transmitter (UART). Descriptions of
the hardware configuration and software routines necessary for proper functionality are
included.
The McBSP is not capable of supporting UART standards natively. However, by simple
modification of the serial control registers, there are two methods by which the McBSP
can be configured to receive and transmit data that is understandable to a UART. The
McBSP can be used in either the serial port mode or the general-purpose input/output
(GPIO) mode. This application report discusses both methods. In addition, this
application report demonstrates the hardware interface between the McBSP and a
UART.
Project collateral and source code discussed in this application report can be
downloaded from the following URL: http://www-s.ti.com/sc/techlit/spra633.zip
Contents
1 Design Problem ..................................................................................... 2
2 Overview ............................................................................................. 2
3 UART Interface Method 1: McBSP in Serial Port Mode ....................................... 2
4 UART Interface Method 2: McBSP in GPIO Mode ............................................. 7
5 Hardware UART Adapter for the C6000 Processors ......................................... 10
6 Conclusion ......................................................................................... 11
7 References ......................................................................................... 11
Appendix A Sample C Code .......................................................................... 12
Appendix B Sample C/Assembly Code ............................................................. 24
List of Figures
1 UART Timing ........................................................................................ 2
2 UART Connection - Serial Port Implementation ................................................ 3
3 McBSP Transfer in UART 8N1 Mode ............................................................ 3
4 Pin Control Register (PCR)........................................................................ 4
5 Receive Control Register (RCR) .................................................................. 5
6 Transmit Control Register (XCR) ................................................................. 5
7 Sample Rate Generator Register (SRGR) ...................................................... 6
8 Block Data Processing of Transmit Buffer ...................................................... 7
9 UART Connection - GPIO Implementation ...................................................... 8
10 Serial Port Control Register (SPCR) ............................................................. 8
11 Pin Control Register (PCR)........................................................................ 9
12 UART Auto-Baud Detection ....................................................................... 9
13 SoftUartInchar UART Data Fetch ............................................................... 10
14 UART Adapter Board ............................................................................. 11
List of Tables
SPRA633C September 2008 TMS320C620x/C642x McBSP: UART 1
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