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LC823450XDTBG Anwendungshinweis

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© Semiconductor Components Industries, LLC, 2017 1 Publication Order Number :
July 2017 - Rev. 1 AND9407/D
AND9407/D
Low Power Techniques of
LC823450 Series
for Audio Applications
Introduction
This application note describes low power techniques to
enable customers to control the power consumption to
meet their operation mode.
Intended audience is customers who are building audio
application using LC823450 Series (called LC823450
hereafter).
BACKGROUND
Hard-wired MP3 playback
LC823450 has a hard-wired MP3 decoder to realize MP3
playback with low power. Using the MP3 decoder can
reduce the current consumption during MP3 playback
comparing with using software decoder by DSP because it
consists of hard-wired logic designed dedicatedly for MP3
decode and it can work with lower frequency than DSP
works.
Sleep mode
LC823450 has Sleep mode to gate the clock of
Cortex-M3 (called CPU hereafter) inside with the standby
instructions which it implements. To reduce the current
consumption, CPU should be set to Sleep mode while it
doesn’t work anything.
WIC Sleep mode + internal power domain control
LC823450 has WIC (Wake-up Interrupt Controller)
Sleep mode to gate the clocks of all blocks except RTC
block by stopping oscillation with register setting and the
standby instructions which it implements. This mode
realizes standby completely except RTC block.
Moreover, LC823450 has some internal power domains
which it can isolate. If you set the power domains to power
off in addition to WIC Sleep mode, LC823450 will be able
to reduce the standby leakage current further.
Keyint RTC mode
: This mode is not available according to the products.
Please see the datasheet.
LC823450 has 2 blocks which are separated electrically
as power domain. One is RTC block and the other is Main
block which has all modules except RTC block. RTC is
Real Time Clock and it consists of timers for calculating
calendar. Main block has CPU, bus system, internal
memories, Audio module and various peripheral modules.
LC823450 has Keyint RTC mode to provide mechanism
which powers on/off all power terminals of Main block
controlling external regulators. In this mode, it can execute
www.onsemi.com
APPLICATION NOTE
calculating calendar in RTC block with very low power
consumption due to power cut of Main block.
About operation for low power control
LC823450 has 3 oscillations of RC, XT1 and XTRTC.
RC is internal RC oscillation for initial operation after reset,
XT1 is Xtal oscillation for main operation and XTRTC is
32.768kHz oscillation for RTC. And it has a fundamental
clock as BASIC clock for CPU, bus system, internal
memories and so on, which is made up based on any of RC,
XT1 or XTRTC.
Moreover, there are registers to enable or disable the
clock of peripherals and the oscillations. You can reduce
the current consumption by disabling the clocks of unused
peripheral modules and the oscillations individually.
Table 1 shows an operation matrix for low power control.
Sleep mode can stop the clock for CPU, WIC Sleep mode
can stop all the oscillations except XTRTC, and Keyint
RTC mode can power off Main block.
Table 1. Operation matrix for low power control
STATE
Main Block
RTC
Block
Wake up
sources
BASIC
clock
CPU core
clock
Peripherals
clock
XT1 RC XT32K
Initial
after
reset
RUN RUN STOP STOP RUN RUN -
Run RUN RUN
RUN
/ STOP
RUN
/ STOP
RUN
/ STOP
RUN -
Sleep RUN STOP
RUN
/ STOP
RUN
/ STOP
RUN
/ STOP
RUN
All interrupt
/ Reset input
WIC
Sleep
STOP STOP STOP STOP STOP RUN
External interrupt
/ Reset input
Keyint
RTC
POWER OFF
POWER
ON
KETINT interrupt
or RTC interrupt
/ VDET input
Figure 1 shows working state transition of oscillation
system. When the reset for LC823450 is asserted,
LC823450 is located in Reset State. After the reset is
Verzeichnis

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