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MAX2027EUP+D Anwendungshinweis - Maxim Integrated

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    Maxim Integrated
  • Kategorie:
    Amplifier chip
  • Fallpaket
    TSSOP-20
  • Beschreibung:
    MAXIM INTEGRATED PRODUCTS MAX2027EUP+D RF Amplifier IC, 15.5dB Gain, 50MHz to 400MHz, 4.75V to 5.25V, TSSOP-20
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MAX2027EUP+D Anwendungshinweis

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Maxim > Design Support > Technical Documents > Application Notes > Communications Circuits > APP 3942
Maxim > Design Support > Technical Documents > Application Notes > High-Speed Interconnect > APP 3942
Keywords: buffer, amplifier, low-noise amplifier, LNA, dynamic range, IF, intercept point, high-speed
ADC, high-resolution ADC, sensitivity, receiver, SNR, ENOB, SFDR, THD, digitally controlled attenuator,
noise figure, compression point
APPLICATION NOTE 3942
Optimize the Buffer Amplifier/ADC Connection
Dec 20, 2006
Abstract: With increasing portions of today's receivers implemented digitally, the conversion of analog
signals to the digital domain has become an extremely important factor to achieve a communications
system's highest dynamic performance. The following article details important parameters that need to be
considered when selecting the proper signal conditioning and conversion components for a
communications system.
Introduction
Communications systems designers have long envisioned the "ideal" digital receiver signal-processing
chain as consisting of an antenna, filter, low-noise amplifier (LNA), and analog-to-digital converter (ADC)
followed by digital-demodulation and signal-processing circuitry. Although this ideal digital receiver may
still be several years away, communications receivers have steadily eliminated stages of frequency
conversion while placing greater importance on the ADC in the front-end architecture. Although some
receiver stages have been eliminated, the buffer amplifier stage that precedes the ADC remains an
important component in a wide range of receivers and can play a major role in the performance achieved
by the ADC.
The buffer amplifier that is added to the signal-processing chain becomes part of a group of functional
blocks, including mixers, filters, and other amplifiers, that must be treated as a single component with a
noise figure, gain, and intercept point. The proper choice of a buffer amplifier for a given ADC can
increase the sensitivity of the receiver without sacrificing the overall spurious-free dynamic range
(SFDR).
Defining Dynamic Range
Receiver sensitivity is one component of the system's dynamic range—sensitivity defines the minimum
signal level that allows the receiver to successfully recover the transmitted information. The upper end of
the dynamic range is the maximum signal that can be processed. This usually defined by the 3rd-order
intercept point (IP3), an imaginary number that marks the point at which a receiver's front-end
components will be overloaded or saturated into compression. Dynamic range is a compromise, of
course, because high sensitivity requires a low noise figure and a high gain. Unfortunately, low-noise
amplifiers (LNAs) with gains of 30dB or more and noise figures of less than 2dB are limited in 3rd-order-
intercept performance, often to values of +10dBm to +15dBm. Thus, these amplifiers can increase
receiver sensitivity, but become a "bottleneck" for high-level signals in the receiver's front-end signal-
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