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MC33931EK Anwendungshinweis

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THROTTLE CONTROL H-BRIDGE
33931
ORDERING INFORMATION
Device
(Add R2 Suffix for
Tape and Reel)
Temperature
Range (T
A
)
Package
MC33931VW
-40 to 125°C
44 HSOP
MC33931EK 32 SOICW-EP
VW SUFFIX (PB-FREE)
98ARH98330A
44-PIN HSOP
WITH PROTRUDING
HEAT SINK
EK SUFFIX (PB-FREE)
98ARL10543D
32-PIN SOICW-EP
Document Number: MC33931
Rev. 4.0, 10/2012
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2008-2012. All rights reserved.
5.0 A Throttle Control H-bridge
The 33931 is a monolithic H-Bridge Power IC in a robust thermally
enhanced package. It is designed primarily for automotive electronic
throttle control, but is applicable to any low voltage DC servo motor
control application within the current and voltage limits stated in this
specification.
The 33931 H-Bridge is able to control inductive loads with currents
up
to 5.0 A peak. RMS current capability is
subject to the degree of
heatsinking provided to the device package. Internal peak-current
limiting (regulation) is activated at load currents above 6.5 A ±1.5 A.
Output loads can be pulse-width modulated (PWM-ed) at frequencies
up to 11 kHz. A load current feedback feature provides a proportional
(0.24%
of the load current) current output suitable for monitoring by a
microcontroller’s A/D input. A Status flag output reports under-voltage,
over-current, and over-temperature fault conditions.
Two independent inputs provide polarity control of two half-bridge
totem-p
ole outputs. The disable inputs are provided to force the H-
bridge outputs to tri-state (high-impedance off-state).
Features
5.0 to 28 V continuous operation (transi
ent operation from 5.0 to
40 V)
•235 mΩ maximum R
DS(ON)
@ T
J
=150 °C (each H-bridge
MOSFET)
•3.0 V and 5.0 V TTL / CMOS logic compatible inputs
Over-current limiting (regulation) via internal constant-off-time
PWM
Output short-circuit protection (short to VPWR or GND)
Temperature-dependant current-limit th
reshold reduction
All inputs have an internal source/sink to define
the default (floating input) states
Sleep mode with current draw < 50 µA
SF
FB
IN1
IN2
D1
EN/D2
VPWR
CCP
OUT1
OUT2
PGND
AGND
MCU
33931
V
PWR
V
DD
MOTOR
Figure 1. MC33931 Simplified Application Diagram
Verzeichnis

MC33931EK Datenblatt-PDF

MC33931EK Anderes Datenblatt
NXP
3 Seiten, 342 KB
MC33931EK Anwendungshinweis
NXP
26 Seiten, 879 KB
MC33931EK Verpackung
NXP
27 Seiten, 813 KB
MC33931EK Notizdatei
NXP
2 Seiten, 225 KB

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