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Semiconductor Components Industries, LLC, 2004
May, 2004 − Rev. 16
1 Publication Order Number:
MC74VHC1G132/D
MC74VHC1G132
2−Input NAND
Schmitt−Trigger
The MC74VHC1G132 is a single gate CMOS Schmitt NAND
trigger fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The MC74VHC1G132 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G132 to be used to interface 5.0 V circuits to
3.0 V circuits.
The MC74VHC1G132 can be used to enhance noise immunity or to
square up slowly changing waveforms.
• High Speed: t
PD
= 3.6 ns (Typ) at V
CC
= 5.0 V
• Low Power Dissipation: I
CC
= 1.0 A (Max) at T
A
= 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 68; Equivalent Gates = 16
• Pb−Free Package is Available
Figure 1. Pinout (Top View)
V
CC
IN B
IN A
OUT Y
GND
IN A
IN B
OUT Y
&
Figure 2. Logic Symbol
1
2
3
4
5
SOT23−5/TSOP−5/SC59−5
DT SUFFIX
CASE 483
1
5
SC70−5/SC−88A/SOT−353
DF SUFFIX
CASE 419A
1
5
PIN ASSIGNMENT
1
2
3 GND
IN B
IN A
4
5V
CC
OUT Y
L
L
H
H
L
H
L
H
FUNCTION TABLE
Inputs Output
AB
H
H
H
L
Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
Pin 1
VD
d
Pin 1
d = Date Code
VD
d
http://onsemi.com
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 1
- ・ Abmessungen des Paketumrisses on Seite 5 Seite 6
- ・ Paket-Footprint-Pad-Layout on Seite 5 Seite 6
- ・ Teilenummerierungssystem on Seite 1 Seite 4 Seite 6
- ・ Markierungsinformationen on Seite 1
- ・ Technische Daten on Seite 4
- ・ Elektrische Spezifikation on Seite 3
