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MMPF0100F2EP
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MMPF0100F2EP Anwendungshinweis - NXP

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MMPF0100F2EP Anwendungshinweis

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Overview
The MMPF0100 power management integrated circuit (PMIC) features a
configurable architecture that supports numerous outputs with various current
ratings as well as programmable voltage and sequencing. This enables the
MMPF0100 to power the core processor, memory and peripherals to provide
a single-chip system power solution for multiple applications, reducing design
complexity and lowering overall bill of materials. The high-performance architecture
offers improved efficiency across the complete output range and delivers advanced
functionality for consumer, industrial and automotive applications.
The MMPF0100 is ideally suited to the i.MX 6 series of applications processors, for
which it is incorporated into multiple reference designs. This provides customers
a platform-level solution from a single supplier to enable faster time to market and
reduced engineering effort.
PF Series
MMPF0100 14-Channel
Configurable PMIC
Target Applications
Automotive infotainment
Home energy management
Human-machine interface
IP headphones
• IPTV
Portable medical devices
• Tablets
OTP Startup Configuration Power Generation
Switching Regulators
SW1A/B/C
(0.3 to 1.875 V)
Configurable 4.5 A or
2.5 A+2.0 A
SW2
(0.4 to 3.3 V, 2 A)
SW3A/B
(0.4 to 3.3 V)
Configurable 2.5 A or
1.25 A+1.25 A
SW4
(0.4 to 3.3 V, 1 A)
Boost Regulator
(5 to 5.15 V, 600 mA)
USB OTG Supply
Linear Regulators
VGEN1
(0.8 to 1.55 V, 100 mA)
VGEN2
(0.8 to 1.55 V, 250 mA)
VGEN3
(1.8 to 3.3 V, 100 mA)
VGEN4
(1.8 to 3.3 V, 350 mA)
VGEN5
(1.8 to 3.3 V, 100 mA)
VGEN6
(1.8 to 3.3 V, 200 mA)
VSNVS
(1.0 to 3.0 V, 400 µA)
RTC Supply with Coin Cell
Charger
OTP Prototyping
(Try Before Buy)
Voltage
Sequence and
Timing
Phasing and
Frequency Selection
DDR Voltage Reference
Parallel MCU Interface
Thermal Current Limit
Short Circuit
Regulator Control
I
2
C Communication and Registers
Internal Core Voltage Reference
Bias and References
Logic and Control
Fault Detection and Protection
MMPF0100 Functional Internal Block Diagram
MMPF0100 Functional Internal Block Diagram
MMPF0100 PMIC Package for Consumer
and Industrial
MMPF0100Z PMIC Wettable Flank Package
for Automotive
Verzeichnis

MMPF0100F2EP Datenblatt-PDF

MMPF0100F2EP Datenblatt PDF
NXP
6 Seiten, 259 KB
MMPF0100F2EP Benutzerreferenzhandbuch
NXP
33 Seiten, 3507 KB
MMPF0100F2EP Programmierhandbuch
NXP
152 Seiten, 2695 KB
MMPF0100F2EP Anderes Datenblatt
NXP
79 Seiten, 5377 KB
MMPF0100F2EP Anwendungshinweis
NXP
2 Seiten, 181 KB

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