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MMPF0100NPAZESR2 Anwendungshinweis

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NXP Semiconductors
Application Note
Document Number: AN4991
Rev. 2.0, 7/2016
© 2016 NXP B.V.
Contents
1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 ZedBoard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Zynq®-7000 SoC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4 MMPF0100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5 Power solution for the ZedBoard . . . . . . . . . . . . . . . . . . . . 11
6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1 Introduction
This document provides a power management solution for Xilinx
Zynq®-7000 System-on-Chips (SoCs), with the Xilinx ZedBoard
highlighted as a design example. The ZedBoard is a development
board with a broad range of expansion options and the Zynq®7000
as its on-board processor. The document presents the power rail
requirements of the Xilinx Zynq®-7000 All Programmable SoCs,
many of which are also applicable to Xilinx Field Programmable
Gate Arrays (FPGAs). For more details about the specific devices
contained in this note, visit www.nxp.com or contact the
appropriate product application team.
The PF0100 is NXP's Power Management IC (PMIC) that
i
ntegrates a total of 14 regulators. Its flexibility in the range of
voltage and current options makes it an optimum choice in a wide
range of applications. This application note addresses the ability of
the PF0100 to provide an optimal solution to the power
requirements of a Zynq®-7000 based system taking into account
typical I/O, memory and peripherals that are interfaced with the
ZedBoard.
NXP analog ICs are manufactured using the SMARTMOS
process, a
combinational BiCMOS manufacturing flow that
integrates precision analog, power functions and dense CMOS
logic together on a single cost-effective die.
Power Management of Xilinx AP SoC using NXP PMIC
Featuring the MMPF0100
Verzeichnis

MMPF0100NPAZESR2 Datenblatt-PDF

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MMPF0100NPAZESR2 Benutzerreferenzhandbuch
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MMPF0100NPAZESR2 Programmierhandbuch
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MMPF0100NPAZESR2 Anderes Datenblatt
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18 Seiten, 188 KB
MMPF0100NPAZESR2 Anwendungshinweis
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26 Seiten, 4400 KB

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