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© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 6
1 Publication Order Number:
NTD3055L170/D
NTD3055L170,
NVD3055L170
Power MOSFET
9.0 A, 60 V, Logic Level, N−Channel
DPAK/IPAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
Features
• NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These are Pb−Free Devices
Typical Applications
• Power Supplies
• Converters
• Power Motor Controls
• Bridge Circuits
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Rating Symbol Value Unit
Drain−to−Source Voltage V
DSS
60 Vdc
Drain−to−Gate Voltage (R
GS
= 10 MW)
V
DGR
60 Vdc
Gate−to−Source Voltage
− Continuous
− Non−repetitive (t
p
v10 ms)
V
GS
V
GS
±15
±20
Vdc
Drain Current
− Continuous @ T
A
= 25°C
− Continuous @ T
A
= 100°C
− Single Pulse (t
p
v10 ms)
I
D
I
D
I
DM
9.0
3.0
27
Adc
Apk
Total Power Dissipation @ T
A
= 25°C
Derate above 25°C
Total Power Dissipation @ T
A
= 25°C (Note 1)
Total Power Dissipation @ T
A
= 25°C (Note 2)
P
D
28.5
0.19
2.1
1.5
W
W/°C
W
W
Operating and Storage Temperature Range T
J
, T
stg
−55 to
175
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting T
J
= 25°C
(V
DD
= 25 Vdc, V
GS
= 5.0 Vdc,
L = 1.0 mH, I
L
(pk) = 7.75 A, V
DS
= 60 Vdc)
E
AS
30 mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
R
q
JC
R
q
JA
R
q
JA
5.2
71.4
100
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 sq in pad size.
2. When surface mounted to an FR4 board using minimum recommended pad size.
9.0 AMPERES, 60 VOLTS
R
DS(on)
= 170 mW
N−Channel
D
S
G
DPAK
CASE 369C
(Surface Mounted)
STYLE 2
1
2
3
4
IPAK
CASE 369D
(Straight Lead)
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
1 − Gate
3 − Source
2 − Drain
4
Drain
1
2
3
4
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
AYWW
31
70LG
AYWW
31
70LG
1 − Gate
3 − Source
2 − Drain
A = Assembly Location*
Y = Year
WW = Work Week
3170L = Device Code
G = Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 1
- ・ Abmessungen des Paketumrisses on Seite 8 Seite 9
- ・ Paket-Footprint-Pad-Layout on Seite 8
- ・ Teilenummerierungssystem on Seite 1 Seite 7 Seite 9
- ・ Markierungsinformationen on Seite 1 Seite 9
- ・ Typisches Anwendungsschaltbild on Seite 1
- ・ Technische Daten on Seite 7
- ・ Anwendungsbereich on Seite 1 Seite 7
- ・ Elektrische Spezifikation on Seite 2
- ・ Teilenummernliste on Seite 1
