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SN74AUP1G08DRLR Anwendungshinweis - TI

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SN74AUP1G08DRLR Anwendungshinweis

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SCYA049AApril 2010Revised July 2016
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Copyright © 2010–2016, Texas Instruments Incorporated
How to Select Little Logic
Application Report
SCYA049AApril 2010Revised July 2016
How to Select Little Logic
Samuel Lin................................................................................................... Standard Linear and Logic
ABSTRACT
TI Little Logic devices are logic-gate devices assembled in a small single-, dual-, or triple- gate package.
Little Logic devices are widely used in portable equipment, such as mobile phones, MP3 players, and
notebook computers. Little Logic devices are also used in desktop computers and telecommunications.
Little Logic gates are common components for easy PC board routing, schematic design, and bug fixes
that add without taking up significant space.
Little Logic devices are offered in several product categories that meet specific requirements of low and
ultra-low voltage, and low power. This application report discusses critical characteristics, features, and
applications of TI’s newest Little Logic family and package offerings.
Contents
1 Introduction ................................................................................................................... 2
2 Little Logic Product Families ............................................................................................... 4
3 Key Concerns in Little Logic Selection .................................................................................. 15
4 System Applications of Little Logic Gates............................................................................... 23
5 Little Logic Package Options/Trend...................................................................................... 27
6 Summary .................................................................................................................... 31
7 References.................................................................................................................. 32
8 Glossary ..................................................................................................................... 32
List of Figures
1 Little Logic Migration to Low Voltage/Low Power ....................................................................... 3
2 PC Board Layout and Better Overall Performance...................................................................... 3
3 AHC vs HC Performance Comparison.................................................................................... 5
4 SN74AHCT1G00 and SN74AHC1G00 Output Structures ............................................................. 5
5 LVC/AUP Power Consumption Comparison ............................................................................. 7
6 AUC Output Structure....................................................................................................... 8
7 Potential Level Translator Applications ................................................................................... 9
8 N-Channel FET Switch (SN74CBTxG).................................................................................. 10
9 V
OUT
vs V
IN
for CBT1G384 and CBT1G125 ............................................................................. 10
10 Typical DC Voltage Translation Characteristics........................................................................ 11
11 N-Channel FET Switch .................................................................................................... 11
12 Pin Assignments (SN74CBT1G384 vs SN74CBT1G125) ............................................................ 12
13 Using Digital Switch as Clock Source Select........................................................................... 12
14 Using SN74CBTD1G384 and SN74CBTD1G125 in Level Translation/Isolation .................................. 13
15 On-State Resistance (r
ON
) vs Input Voltage for Parallel N-Channel and P-Channel FET Switch................ 14
16 SPST CMOS Analog Switch Applications .............................................................................. 15
17 Logic Switching Levels (Inputs/Outputs) ................................................................................ 16
18 Input Voltage Range....................................................................................................... 18
19 Linear Input With Output Using Schmitt-Trigger Input Gate.......................................................... 19
20 Hysteresis - Input Voltage vs Time ...................................................................................... 19
Verzeichnis

SN74AUP1G08DRLR Datenblatt-PDF

SN74AUP1G08DRLR Datenblatt PDF
TI
36 Seiten, 1771 KB
SN74AUP1G08DRLR Benutzerreferenzhandbuch
TI
25 Seiten, 4985 KB
SN74AUP1G08DRLR Anwendungshinweis
TI
33 Seiten, 1057 KB
SN74AUP1G08DRLR Notizdatei
TI
8 Seiten, 254 KB

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