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March 2014 DocID025493 Rev 2 1/53
AN4389
Application note
SPC574K72/SPC57EM80 Getting Started
Introduction
The SPC574K72/SPC57EM80 devices family is built on Power Architecture
®
technology
and is targeted for automotive powertrain controller applications, chassis control
applications, transmission control applications, steering and braking applications, as well as
low-end hybrid applications and safety applications that require a high safety integrity level
(ISO 26262 for ASIL-D safety integrity).
In order to minimize some additional software and module level features to reach this target,
an on-chip redundancy is offered for the critical components of the microcontroller (see
Functional Safety chapter of RM) by multiple CPU computational cores with delayed
lockstep, an I/O processor core, a DMA controller, an interrupt controller, a dual crossbar
bus system, a memory protection unit, a fault collection and control unit (FCCU), flash an
end-to-end error correction coding (ECC).
This family operates up to 200MHz and offers a high performance processing optimized
moreover if compared with the previous family (SPC56) within a similar power envelope.
Some hardware in the new family also helps to prevent and control critical electronics
system faults and protects against harmful hacks.
This application note details the steps required to properly initialize the
SPC574K72/SPC57EM80 devices family from power-up to the code execution as well as
how to control the boot-up of the available cores. An example code is described throughout
the application note to explain the steps.
It is intended that this application note is read along with the SPC574K72/SPC57EM80
Reference Manuals, that can be obtained from the STMicroelectronics website at
http://ww.st.com
(see Appendix E: Further Information).
www.st.com
Verzeichnis
- ・ Blockdiagramm on Seite 8 Seite 9 Seite 36
- ・ Technische Daten on Seite 53
- ・ Anwendungsbereich on Seite 53
