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STH320N4F6-2 Anwendungshinweis - ST Microelectronics

  • Hersteller:
    ST Microelectronics
  • Kategorie:
    MOSFET, MOSFET Transistor
  • Fallpaket
    TO-252-3
  • Beschreibung:
    H2PAK N-CH 40V 200A
Aktualisierte Uhrzeit: 2025-06-18 17:16:25 (UTC+8)

STH320N4F6-2 Anwendungshinweis

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Application Report
SPRA610 - December 1999
1
A Block Floating Point Implementation
on the TMS320C54x DSP
Arun Chhabra and Ramesh Iyer Digital Signal Processing Solution
s
ABSTRACT
Block floating-point (BFP) implementation provides an innovative method of floating-point
emulation. This application report implements the BFP algorithm for the Fast Fourier
Transform (FFT) algorithm on a Texas Instruments (TI) TMS320C54x DSP by taking
advantage of the exponent encoder and normalization units on the DSP. The BFP algorithm
as it applies to the FFT allows fractional signal gain adjustment in a fixed-point environment
by using a block representation of input values of block size N to an N-point FFT. This
algorithm is applied repetitively to all stages of the FFT. The elements within a block are
further represented by their respective mantissas and a common exponent assigned to the
block. This method allows for aggressive scaling with a single exponent while retaining
greater dynamic range in the output. This application report discusses the BFP FFT and
demonstrates its implementation in assembly language. The implementation is carried out
on a fixed-point digital signal processor (DSP). The fixed-point BFP FFT results are
contrasted with the results of a floating-point FFT of the same size implemented with
MATLAB. For applications where the FFT is a core component of the overall algorithm, the
BFP FFT can provide results approaching floating-point dynamic range on a low-cost
fixed-point processor. Most DSP applications can be handled with fixed-point representation.
However, for those applications that require extended dynamic range but do not warrant the
cost of a floating-point chip, a block floating-point implementation on a fixed-point chip readily
provides a cost-effective solution.
Contents
1 Fixed- and Floating-Point Representations 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Precision, Dynamic Range and Quantization Effects 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 The Block Floating Point Concept 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 The Block Floating Point for a Complex FFT 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Implementing the Block Floating Point – Approaches Taken 7. . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Analysis of Results 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Conclusion 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Reference 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

STH320N4F6-2 Datenblatt-PDF

STH320N4F6-2 Datenblatt PDF
ST Microelectronics
19 Seiten, 1067 KB
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