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Application Report
SLVA145 – October 2003
Disabling the Watchdog Timer for TI’s Family of Supervisors
Dennis Hudgins PMP Portable Power
ABSTRACT
In many microprocessor applications where a watchdog supervisor, such as the
TPS3306, is required, it may be necessary to disable the watchdog. This is particularly
true when software boot times exceed the watchdog time-out period. This application
note describes a circuit that can be used to selectively disable the watchdog timer.
The watchdog timer in many of TI’s supervisory circuits can be disabled by leaving the WDI pin
open. In this mode, an internal signal is provided to periodically reset the watchdog time-out
timer. If the WDI pin is grounded or pulled high, the internal trigger is disabled and watchdog
time-outs occur. Table 1 shows several supervisors that feature a watchdog timer that is easily
disabled, as well as their minimum time-out periods.
Table 1. Minimum Watchdog Time-Outs for Supervisor Devices
Device Minimum Watchdog
Time-out (seconds)
TPS36xx 0.48
TPS3820 0.112
TPS3823/4/8 0.9
TPS3305/3705 1.1
TPS3306 0.5
TPS3705 1.1
Applications that require a watchdog timer must make sure the software boot time does
not exceed the minimum watchdog time-out period. If the boot time does exceed the
watchdog time-out period, the application loops through the boot cycle indefinitely.
However, if the circuit shown in Figure 1 is used, the watchdog timer time-out period is
effectively extended as long as the boot time requires. This circuit is ideal in applications
that have long boot times, but require a watchdog with a short time-out period. Shorter
watchdog time-out periods are generally preferred in applications that need to respond
quickly to processor fault conditions.
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