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AN1187.1
ISL59420/21EVAL1 Evaluation Board
User’s Guide
Introduction
The ISL59420/21EVAL1 evaluation board contains all the
circuitry needed to characterize critical performance
parameters of the ISL59420, ISL59421 single 2:1 MUX-
amplifier, over a variety of applications.
The ISL59420, ISL59421 are single-output, gain-selectable
2:1 MUX-amps. The unity-gain bandwidths are 400MHz for
the ISL59420 and 900MHz for the ISL59421. Each contain a
common set of logic inputs for channel selection (S) three-
state output control (HIZ) and an enable control input that
powers down the device (EN
).
The evaluation board circuit and layout is optimized for
either 50Ω or 75Ω terminations, and implements a basic
single 2:1 video MUX-amp. The board is supplied with 75Ω
input signal terminations and a 75Ω back-termination
resistor on each of the 3 outputs, making it suitable for
driving video cable. The user has the option of replacing the
75Ω resistors with 50Ω resistors for other applications. The
control lines contain 50Ω resistors to match the 50Ω output
impedance of high speed pulse generators. Control line
termination resistors are recommended for rise and fall times
under 10ns to minimize unwanted transients. If DC is used
for the control logic, the resistors may be removed; or the
applied DC voltage can be reduced to 2.5V to reduce the
dissipation in the termination resistor.
The layout contains component options to include an output
series resistor (R
S
) followed by a parallel resistor (R
L
)
capacitor (C
L
) network to ground. This option allows the user
to select several different output configurations. Examples
are shown in Figures 2A, 2B, and 2C. The evaluation board
is supplied with the 75Ω back termination resistors shown in
Figure 2C.
Amplifier Performance and Output
Configurations
The ISL59420, ISL59421 output amplifier is externally gain-
selectable with the non-inverting input directly coupled to the
2:1 MUX output. The inverting input is pinned out to the
evaluation board. Resistor R
F
is set to the value shown in
Figure 2D, and in conjunction with the amplifier internal
capacitance, provides optimum frequency response with
minimal gain peaking. The output amplifier is ideally suited
for driving high impedance high speed selectable-gain
buffers when gain compensation is needed. GBW decreases
slightly at the lower output load impedances typical of back-
terminated cable driving applications. Reference data sheets
for additional performance data.
High Frequency Layout Considerations
At frequencies of 500MHz and higher, circuit board layout
may limit performance. The following layout guidelines are
implemented on the evaluation board:
• Signal I/O lines are the same lengths and widths to match
propagation delay and trace parasitics.
• No series connected vias are used in signal I/O lines, as
they can add unwanted inductance.
• Signal trace lengths are minimized to reduce transmission
line effects and the need for strip-line tuning of the signal
traces.
• High frequency decoupling caps are placed as close to the
device power supply pin as possible - without series vias
between the capacitor and the device pin.
Power Sequencing
Proper power supply sequencing is -V first, then +V. In
addition, the +V and -V supply pin voltage rate-of-rise must
be limited to ±1V/µs or less. The evaluation board contains
parallel-connected low V
ON
Schottky diodes on each supply
terminal to minimize the risk of latch up due to incorrect
sequencing. In addition, extra 10µF decoupling capacitors
are added to each supply to aid in reducing the applied
voltage rate-of-rise.
Reference Documents
• ISL59420 Data Sheet, FN7459
• ISL59421 Data Sheet, FN7458
OUT
DECODE
IN0
IN1
S0
ENABLE
EN0
EN1
HIZ
AMPLIFIER BIAS
FIGURE 1. ISL59420, ISL59421 FUNCTIONAL BLOCK
-
+
Application Note August 10, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
