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User's Guide
SLAU287A–December 2009–Revised May 2010
TAS5630PHD2EVM
This user’s guide describes the operation of the evaluation module for the TAS5630 300W Stereo
Feedback Analog-Input Digital Amplifier from Texas Instruments. The user’s guide also provides
measurement data and design information including the schematic, BOM, and PCB layout.
Contents
1 Overview ..................................................................................................................... 3
1.1 TAS5630PHD2EVM Features .................................................................................... 4
1.2 PCB Key Map ...................................................................................................... 5
2 Quick Setup Guide .......................................................................................................... 5
2.1 Electrostatic Discharge Warning ................................................................................. 5
2.2 Unpacking the EVM ................................................................................................ 6
2.3 Power Supply Setup ............................................................................................... 6
2.4 Applying Input Signal .............................................................................................. 6
2.5 Speaker Connection ............................................................................................... 7
2.6 Output configuration BTL and PBTL ............................................................................ 7
3 Protection .................................................................................................................... 7
3.1 Short-Circuit Protection and Fault-Reporting Circuitry ........................................................ 8
3.2 Fault Reporting ..................................................................................................... 8
4 TAS5630PHD2EVM Performance ........................................................................................ 8
4.1 THD+N vs Power (BTL –4 Ω) ................................................................................... 10
4.2 THD+N vs Power (BTL –8 Ω) ................................................................................... 10
4.3 THD+N vs Power (PBTL –2 Ω) ................................................................................. 11
4.4 THD+N vs Frequency (BTL –4 Ω) .............................................................................. 11
4.5 THD+N vs Frequency (BTL –8 Ω) .............................................................................. 12
4.6 THD+N vs Frequency (PBTL –2 Ω) ............................................................................ 12
4.7 FFT Spectrum with –60-dBFS Tone (BTL) .................................................................... 12
4.8 FFT Spectrum With –60-dBFS Tone (PBTL) ................................................................. 13
4.9 Idle Noise FFT Spectrum (BTL) ................................................................................ 13
4.10 Idle Noise FFT Spectrum (PBTL) .............................................................................. 14
4.11 Channel Separation .............................................................................................. 15
4.12 Frequency Response (BTL) ..................................................................................... 15
4.13 Frequency Response (PBTL) ................................................................................... 16
4.14 High-Current Protection (BTL) .................................................................................. 16
4.15 High-Current Protection (PBTL) ................................................................................ 17
4.16 Pop/Click (BTL) ................................................................................................... 17
4.17 Pop/Click (PBTL) ................................................................................................. 18
4.18 Output Stage Efficiency .......................................................................................... 18
5 Related Documentation from Texas Instruments ..................................................................... 19
5.1 Additional Documentation ....................................................................................... 19
Appendix A Design Documents ............................................................................................... 20
List of Figures
1 Integrated PurePath™ Premier Pro Amplifier System ................................................................. 4
2 Physical Structure for the TAS53630PHDEVM (Approximate Layout) .............................................. 5
3 Figure 3. PBTL Mode Configuration...................................................................................... 7
PurePath is a trademark of Texas Instruments.
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SLAU287A–December 2009–Revised May 2010 TAS5630PHD2EVM
Copyright © 2009–2010, Texas Instruments Incorporated
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