User's Guide
SLLU148–May 2011
TLK10002 Dual-Channel, 10-Gbps, Multi-Rate Transceiver
Evaluation Module
This user’s guide describes the usage and construction of the TLK10002 evaluation module (EVM). This
document provides guidance on proper use by showing some device configurations and test modes. In
addition, design, layout, and schematic information is provided to the customer. Information in this guide
can assist the customer in choosing the optimal design methods and materials in designing a complete
system.
Contents
1 Introduction .................................................................................................................. 4
2 EVM PCB and High-Speed Design Considerations .................................................................... 5
3 TLK10002EVM Kit Contents ............................................................................................... 6
4 Power ......................................................................................................................... 6
5 Control and Output Status Signals ....................................................................................... 7
6 MDIO ......................................................................................................................... 7
7 JTAG .......................................................................................................................... 8
8 Reset ......................................................................................................................... 8
9 Test and Setup Configurations ............................................................................................ 9
10 TLK10002EVM Motherboard Schematics .............................................................................. 17
11 TLK10002EVM Motherboard Bill of Materials ......................................................................... 37
12 TLK10002EVM Motherboard Layout .................................................................................... 42
13 TLK10002EVM FPGA Daughterboard Schematics ................................................................... 53
14 TLK10002EVM FPGA Daughterboard Bill of Materials .............................................................. 68
15 TLK10002EVM FPGA Daughterboard Layout ......................................................................... 73
16 TLK10002EVM SMA Breakout Board Schematics .................................................................... 83
17 TLK10002EVM SMA Breakout Board Layout ......................................................................... 88
List of Figures
1 TLK10002EVM Boards .................................................................................................... 4
2 TLK10002EVM Motherboard............................................................................................. 10
3 TLK10002EVM FPGA Daughterboard.................................................................................. 11
4 TLK10002EVM SMA Breakout Board .................................................................................. 12
5 TLK10002EVM Motherboard and FPGA Daughterboard ............................................................ 13
6 CRPAT Test Setup With FPGA Generator and Verifier.............................................................. 14
7 Optimizing the High-Speed Link of a System Board Through the GUI............................................. 15
8 TLK10002EVM Motherboard and SMA Breakout Board............................................................. 16
9 Cover Page and Index, Sheet 1 of 20 .................................................................................. 17
10 USB Interface, Sheet 2 of 20 ............................................................................................ 18
11 1P0V, 1P5V, and 1P8V Regulators, Sheet 3 of 20 ................................................................... 19
12 2P5V and 3P3V Regulators, Sheet 4 of 20............................................................................ 20
13 Power Distribution, Sheet 5 of 20 ....................................................................................... 21
14 Device Power, Ground, and Local Decoupling, Sheet 6 of 20 ...................................................... 22
15 Global Signals, Sheet 7 of 20............................................................................................ 23
16 MDIO, JTAG, and I2C Interface, Sheet 8 of 20 ....................................................................... 24
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SLLU148– May 2011 TLK10002 Dual-Channel, 10-Gbps, Multi-Rate Transceiver Evaluation Module
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