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TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
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SPRS584J –APRIL 2009–REVISED OCTOBER 2013
Piccolo™ Microcontrollers
Check for Samples: TMS320F28030, TMS320F28031, TMS320F28032, TMS320F28033, TMS320F28034, TMS320F28035
1 TMS320F2803x (Piccolo) MCUs
1.1 Features
1234
• High-Efficiency 32-Bit CPU ( TMS320C28x™) • Peripheral Interrupt Expansion (PIE) Block That
Supports All Peripheral Interrupts
– 60 MHz (16.67-ns Cycle Time)
• Three 32-Bit CPU Timers
– 16 x 16 and 32 x 32 MAC Operations
• Independent 16-Bit Timer in Each ePWM
– 16 x 16 Dual MAC
Module
– Harvard Bus Architecture
• On-Chip Memory
– Atomic Operations
– Flash, SARAM, OTP, Boot ROM Available
– Fast Interrupt Response and Processing
• Code-Security Module
– Unified Memory Programming Model
• 128-Bit Security Key/Lock
– Code-Efficient (in C/C++ and Assembly)
– Protects Secure Memory Blocks
• Programmable Control Law Accelerator (CLA)
– Prevents Firmware Reverse Engineering
– 32-Bit Floating-Point Math Accelerator
• Serial Port Peripherals
– Executes Code Independently of the Main
– One SCI (UART) Module
CPU
– Two SPI Modules
• Endianness: Little Endian
– One Inter-Integrated-Circuit (I
2
C) Bus
• JTAG Boundary Scan Support
(1)
– One Local Interconnect Network (LIN) Bus
• Low Cost for Both Device and System:
– One Enhanced Controller Area Network
– Single 3.3-V Supply
(eCAN) Bus
– No Power Sequencing Requirement
• Enhanced Control Peripherals
– Integrated Power-on Reset and Brown-out
– Enhanced Pulse Width Modulator (ePWM)
Reset
– High-Resolution PWM (HRPWM) Module
– Low Power
– Enhanced Capture (eCAP) Module
– No Analog Support Pins
– High-Resolution Input Capture (HRCAP)
• Clocking:
Module
– Two Internal Zero-pin Oscillators
– Enhanced Quadrature Encoder Pulse (eQEP)
– On-Chip Crystal Oscillator/External Clock
Module
Input
– Analog-to-Digital Converter (ADC)
– Dynamic PLL Ratio Changes Supported
– On-Chip Temperature Sensor
– Watchdog Timer Module
– Comparator
– Missing Clock Detection Circuitry
• Advanced Emulation Features
• Up to 45 Individually Programmable,
– Analysis and Breakpoint Functions
Multiplexed GPIO Pins With Input Filtering
– Real-Time Debug via Hardware
• 2803x Packages
– 56-Pin RSH Very Small Quad Flatpack
(No Lead) (VQFN)
– 64-Pin PAG Thin Quad Flatpack (TQFP)
– 80-Pin PN Low-Profile Quad Flatpack (LQFP)
(1) IEEE Standard 1149.1-1990 Standard Test Access Port and
Boundary Scan Architecture
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Piccolo, TMS320C28x, C28x, TMS320C2000, Code Composer Studio, XDS510, XDS560 are trademarks of Texas
Instruments.
3I
2
C-bus is a registered trademark of NXP B.V. Corporation.
4All other trademarks are the property of their respective owners.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information
Copyright © 2009–2013, Texas Instruments Incorporated
current as of publication date. Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not necessarily include
testing of all parameters.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 10 Seite 59
- ・ Abmessungen des Paketumrisses on Seite 153 Seite 154 Seite 155
- ・ Markierungsinformationen on Seite 153 Seite 154 Seite 155 Seite 156
- ・ Blockdiagramm on Seite 3 Seite 57 Seite 64 Seite 67 Seite 70
- ・ Typisches Anwendungsschaltbild on Seite 37 Seite 65
- ・ Technische Daten on Seite 33 Seite 34 Seite 50 Seite 105 Seite 106
- ・ Anwendungsbereich on Seite 2 Seite 53 Seite 126 Seite 157
- ・ Elektrische Spezifikation on Seite 15 Seite 34 Seite 50 Seite 105 Seite 106
