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TMS320DM6443
www.ti.com
SPRS282G–DECEMBER 2005–REVISED AUGUST 2010
TMS320DM6443
Digital Media System-on-Chip
Check for Samples: TMS320DM6443
1 Digital Media System-on-Chip (DMSoC)
1.1 Features
12
• High-Performance Digital Media SoC • C64x+ L1/L2 Memory Architecture
– 594-MHz C64x+™ Clock Rate – 32K-Byte L1P Program RAM/Cache (Direct
Mapped)
– 297-MHz ARM926EJ-S™ Clock Rate
– 80K-Byte L1D Data RAM/Cache (2-Way
– Eight 32-Bit C64x+ Instructions/Cycle
Set-Associative)
– 4752 C64x+ MIPS
– 64K-Byte L2 Unified Mapped RAM/Cache
– Fully Software-Compatible With C64x /
(Flexible RAM/Cache Allocation)
ARM9™
• ARM926EJ-S Core
• Advanced Very-Long-Instruction-Word (VLIW)
– Support for 32-Bit and 16-Bit (Thumb®
TMS320C64x+™ DSP Core
Mode) Instruction Sets
– Eight Highly Independent Functional Units
– DSP Instruction Extensions and Single Cycle
• Six ALUs (32-/40-Bit), Each Supports
MAC
Single 32-Bit, Dual 16-Bit, or Quad 8-Bit
– ARM® Jazelle® Technology
Arithmetic per Clock Cycle
– EmbeddedICE-RT™ Logic for Real-Time
• Two Multipliers Support Four 16 x 16-Bit
Debug
Multiplies (32-Bit Results) per Clock
Cycle or Eight 8 x 8-Bit Multiplies (16-Bit • ARM9 Memory Architecture
Results) per Clock Cycle
– 16K-Byte Instruction Cache
– Load-Store Architecture With Non-Aligned
– 8K-Byte Data Cache
Support
– 16K-Byte RAM
– 64 32-Bit General-Purpose Registers
– 8K-Byte ROM
– Instruction Packing Reduces Code Size
• Emulation Trace Buffer™ (ETB11™) With 4-KB
– All Instructions Conditional
Memory for ARM9 Debug
– Additional C64x+™ Enhancements
• Endianness: Little Endian for ARM and DSP
• Protected Mode Operation
• Video Processing Subsystem
• Exceptions Support for Error Detection
– Resize Engine Provides:
and Program Redirection
• Resize Images From 1/4x to 4x
• Hardware Support for Modulo Loop
• Separate Horizontal and Vertical Control
Operation
– Back End Provides:
• C64x+ Instruction Set Features
• Hardware On-Screen Display (OSD)
– Byte-Addressable (8-/16-/32-/64-Bit Data)
• 4 - 54 MHz DACs for a Combination of
– 8-Bit Overflow Protection
– Composite NTSC/PAL Video
– Bit-Field Extract, Set, Clear
– Luma/Chroma Separate Video
– Normalization, Saturation, Bit-Counting
(S-video)
– Compact 16-Bit Instructions
– Component (YPbPr or RGB) Video
– Additional Instructions to Support Complex
(Progressive)
Multiplies
• Digital Output
– 8-/16-Bit YUV or up to 24-Bit RGB
– HD Resolution
– Up to 2 Video Windows
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 25 Seite 72
- ・ Abmessungen des Paketumrisses on Seite 216
- ・ Markierungsinformationen on Seite 216
- ・ Blockdiagramm on Seite 5 Seite 85 Seite 92 Seite 94 Seite 95
- ・ Technische Daten on Seite 16 Seite 86 Seite 89 Seite 90 Seite 91
- ・ Anwendungsbereich on Seite 2
- ・ Elektrische Spezifikation on Seite 16 Seite 88 Seite 89 Seite 90 Seite 91
