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TMS320F28055
,
TMS320F28054
,
TMS320F28053
TMS320F28052, TMS320F28051, TMS320F28050
www.ti.com
SPRS797B –NOVEMBER 2012–REVISED JULY 2014
TMS320F2805x Piccolo™ Microcontrollers
1 Device Overview
1.1 Features
1
• High-Efficiency 32-Bit CPU (TMS320C28x) • Peripheral Interrupt Expansion (PIE) Block That
Supports All Peripheral Interrupts
– 60 MHz (16.67-ns Cycle Time)
• Three 32-Bit CPU Timers
– 16 x 16 and 32 x 32 MAC Operations
• Independent 16-Bit Timer in Each ePWM Module
– 16 x 16 Dual MAC
• On-Chip Memory
– Harvard Bus Architecture
– Flash, SARAM, Message RAM, OTP, CLA Data
– Atomic Operations
ROM, Boot ROM, Secure ROM Available
– Fast Interrupt Response and Processing
• 128-Bit Security Key and Lock
– Unified Memory Programming Model
– Protects Secure Memory Blocks
– Code-Efficient (in C/C++ and Assembly)
– Prevents Firmware Reverse Engineering
• Programmable Control Law Accelerator (CLA)
• Serial Port Peripherals
– 32-Bit Floating-Point Math Accelerator
– Three Serial Communications Interface (SCI)
– Executes Code Independently of the Main CPU
(Universal Asynchronous Receiver/Transmitter
• Dual-Zone Security Module
[UART]) Modules
• Endianness: Little Endian
– One Serial Peripheral Inteface (SPI) Module
• Low Device and System Cost:
– One Inter-Integrated-Circuit (I
2
C) Bus
– Single 3.3-V Supply
– One Enhanced Controller Area Network (eCAN)
– No Power Sequencing Requirement
Bus
– Integrated Power-on Reset and Brown-out
• Enhanced Control Peripherals
Reset
– Enhanced Pulse Width Modulator (ePWM)
– Low Power
– Enhanced Capture (eCAP) Module
– No Analog Support Pins
– Enhanced Quadrature Encoder Pulse (eQEP)
• Clocking:
Module
– Two Internal Zero-Pin Oscillators
• Analog Peripherals
– On-Chip Crystal Oscillator and External Clock
– One 12-Bit Analog-to-Digital Converter (ADC)
Input
– One On-Chip Temperature Sensor for Oscillator
– Watchdog Timer Module
Compensation
– Missing Clock Detection Circuitry
– Up to Seven Comparators With up to Three
• Up to 42 Individually Programmable, Multiplexed
Integrated Digital-to-Analog Converters (DACs)
General-Purpose Input/Output (GPIO) Pins With
– One Buffered Reference DAC
Input Filtering
– Up to Four Programmable Gain Amplifiers
• JTAG Boundary Scan Support
(PGAs)
– IEEE Standard 1149.1-1990 Standard Test
– Up to Four Digital Filters
Access Port and Boundary Scan Architecture
• Advanced Emulation Features
– Analysis and Breakpoint Functions
– Real-Time Debug via Hardware
• 80-Pin PN Low-Profile Quad Flatpack (LQFP)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Verzeichnis
- ・ Abmessungen des Paketumrisses on Seite 146 Seite 147
- ・ Markierungsinformationen on Seite 146 Seite 147 Seite 148
- ・ Blockdiagramm on Seite 3 Seite 75 Seite 97 Seite 106 Seite 109
- ・ Typisches Anwendungsschaltbild on Seite 46 Seite 96
- ・ Technische Daten on Seite 19 Seite 20 Seite 21 Seite 22 Seite 23
- ・ Anwendungsbereich on Seite 2 Seite 66 Seite 150
- ・ Elektrische Spezifikation on Seite 20 Seite 80 Seite 93 Seite 94
