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TPS61025DRCR
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TPS61025DRCR Benutzerreferenzhandbuch - TI

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TPS61025DRCR Benutzerreferenzhandbuch

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MSP430F5438
,
MSP430F5437
,
MSP430F5436
,
MSP430F5435
MSP430F5419, MSP430F5418
SLAS612E AUGUST 2009REVISED AUGUST 2014
MSP430F543x and MSP430F541x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
Low Supply Voltage Range: 2.2 V to 3.6 V 16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
Ultralow Power Consumption
16-Bit Timer TA1, Timer_A With Three
Active Mode (AM): All System Clocks Active
Capture/Compare Registers
312 µA/MHz at 8 MHz, 3.0 V, Flash Program
16-Bit Timer TB0, Timer_B With Seven
Execution (Typical)
Capture/Compare Shadow Registers
140 µA/MHz at 8 MHz, 3.0 V, RAM Program
Up to Four Universal Serial Communication
Execution (Typical)
Interfaces
Standby Mode (LPM3):
USCI_A0, USCI_A1, USCI_A2, and USCI_A3
Real-Time Clock (RTC) With Crystal,
Each Support:
Watchdog, and Supply Supervisor
Enhanced UART Supports Automatic Baud-
Operational, Full RAM Retention, Fast
Rate Detection
Wakeup: 2.6 µA at 3.0 V (Typical)
IrDA Encoder and Decoder
Low-Power Oscillator (VLO), General-
Synchronous SPI
Purpose Counter, Watchdog, and Supply
Supervisor Operational, Full RAM Retention,
USCI_B0, USCI_B1, USCI_B2, and USCI_B3
Fast Wakeup: 1.8 µA at 3.0 V (Typical)
Each Support:
Off Mode (LPM4):
I
2
C
Full RAM Retention, Supply Supervisor
Synchronous SPI
Operational, Fast Wakeup:
12-Bit Analog-to-Digital Converter (ADC)
1.69 µA at 3.0 V (Typical)
Internal Reference
Wakeup From Standby Mode in Less Than 5 µs
Sample-and-Hold
16-Bit RISC Architecture
Autoscan Feature
Extended Memory
14 External Channels, 2 Internal Channels
Up to 18-MHz System Clock
Hardware Multiplier Supporting 32-Bit Operations
Flexible Power Management System
Serial Onboard Programming, No External
Fully Integrated LDO With Programmable
Programming Voltage Needed
Regulated Core Supply Voltage
Three-Channel Internal DMA
Supply Voltage Supervision, Monitoring, and
Basic Timer With RTC Feature
Brownout
Section 3 Summarizes the Available Family
Unified Clock System
Members
FLL Control Loop for Frequency Stabilization
For Complete Module Descriptions, See the
Low-Power Low-Frequency Internal Clock
MSP430x5xx and MSP430x6xx Family User's
Source (VLO)
Guide (SLAU208)
Low-Frequency Trimmed Internal Reference
Source (REFO)
32-kHz Crystals
High-Frequency Crystals up to 32 MHz
1.2 Applications
Analog and Digital Sensor Systems Thermostats
Digital Motor Control Digital Timers
Remote Controls Hand-Held Meters
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Verzeichnis

TPS61025DRCR Datenblatt-PDF

TPS61025DRCR Datenblatt PDF
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TPS61025DRCR Benutzerreferenzhandbuch
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TPS61025DRCR Anderes Datenblatt
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TPS61025DRCR Produktkatalog
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