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Design
TRF7962A
SLOS757E –DECEMBER 2011–REVISED JANUARY 2015
TRF7962A Fully Integrated 13.56-MHz RFID Reader/Writer IC
For ISO15693 and ISO18000-3 Standards
1 Introduction
1.1 Features
1
• Completely Integrated Protocol Handling for • Dual Receiver Architecture With RSSI for
ISO15693 and ISO18000-3 Elimination of "Read Holes" and Adjacent Reader
System or Ambient In-Band Noise Detection
• Input Voltage Range: 2.7 VDC to 5.5 VDC
• Programmable Power Modes for Ultra-Low-Power
• Programmable Output Power:
System Design (Power Down <0.5 µA)
+20 dBm (100 mW) or +23 dBm (200 mW)
• Parallel or SPI Interface
• Programmable I/O Voltage Levels:
1.8 VDC to 5.5 VDC • Integrated Voltage Regulator for Microcontroller
Supply
• Programmable System Clock Frequency Output
(RF, RF/2, RF/4) • Temperature Range: –25°C to 85°C
• Programmable Modulation Depth • 32-Pin QFN Package (5 mm × 5 mm) (RHB)
1.2 Applications
• Product Authentication • Library Management
• Access Control • Medical Systems
• Digital Door Locks • Remote Sensor Applications
1.3 Description
The TRF7962A device is an integrated analog front end (AFE) and data-framing device for a 13.56-MHz
RFID reader/writer system. Built-in programming options make it suitable for a wide range of applications
for vicinity identification systems.
The reader is configured by selecting the desired protocol in the control registers. Direct access to all
control registers allows fine tuning of various reader parameters as needed.
Comprehensive documentation, reference designs, evaluation modules, and TI microcontrollers (based on
MSP430™ or ARM
®
technology) source code are available.
The TRF7962A device is a high-performance 13.56-MHz HF RFID reader IC comprising an integrated
AFE and a built-in data framing engine for ISO15693 with all framing and synchronization tasks onboard
(in ISO Mode, default). This architecture lets the customer build a complete and cost-effective yet high-
performance HF RFID reader/writer using a low-cost microcontroller (for example, an MSP430).
Other standards and even custom protocols can be implemented by using two of the direct modes that the
device offers. These direct modes (0 and 1) let the user fully control the AFE and also gain access to the
raw subcarrier data or the unframed, but already ISO-formatted, data and the associated (extracted) clock
signal.
The receiver system has a dual-input receiver architecture. The receivers also include various automatic
and manual gain control options. The received input bandwidth can be selected to cover a broad range of
input subcarrier signal options.
The received signal strength from transponders, ambient sources or internal levels is available in the RSSI
register. The receiver output is selectable among a digitized subcarrier signal and any of the integrated
subcarrier decoders. The selected subcarrier decoder delivers the data bitstream and the data clock as
outputs.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 24
- ・ Abmessungen des Paketumrisses on Seite 62 Seite 64 Seite 65 Seite 69
- ・ Paket-Footprint-Pad-Layout on Seite 70
- ・ Markierungsinformationen on Seite 62
- ・ Blockdiagramm on Seite 2 Seite 3 Seite 10 Seite 11 Seite 12
- ・ Beschreibung der Funktionen on Seite 45 Seite 46 Seite 47 Seite 48 Seite 49
- ・ Technische Daten on Seite 7 Seite 8 Seite 9
- ・ Anwendungsbereich on Seite 1 Seite 74
- ・ Elektrische Spezifikation on Seite 8
