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ATMEGA128L-8MNR
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ATMEGA128L-8MNR Programmierhandbuch

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Features
High-performance, Low-power AVR
®
8-bit Microcontroller
Advanced RISC Architecture
133 Powerful Instructions – Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers + Peripheral Control Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
128K Bytes of In-System Self-programmable Flash program memory
4K Bytes EEPROM
4K Bytes Internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data retention: 20 years at 85°C/100 years at 25°C
(1)
Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Up to 64K Bytes Optional External Memory Space
Programming Lock for Software Security
SPI Interface for In-System Programming
JTAG (IEEE std. 1149.1 Compliant) Interface
Boundary-scan Capabilities According to the JTAG Standard
Extensive On-chip Debug Support
Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode and
Capture Mode
Real Time Counter with Separate Oscillator
Two 8-bit PWM Channels
6 PWM Channels with Programmable Resolution from 2 to 16 Bits
Output Compare Modulator
8-channel, 10-bit ADC
8 Single-ended Channels
7 Differential Channels
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
Byte-oriented Two-wire Serial Interface
Dual Programmable Serial USARTs
Master/Slave SPI Serial Interface
Programmable Watchdog Timer with On-chip Oscillator
On-chip Analog Comparator
Special Microcontroller Features
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and
Extended Standby
Software Selectable Clock Frequency
ATmega103 Compatibility Mode Selected by a Fuse
Global Pull-up Disable
I/O and Packages
53 Programmable I/O Lines
64-lead TQFP and 64-pad QFN/MLF
Operating Voltages
2.7 - 5.5V ATmega128L
4.5 - 5.5V ATmega128
Speed Grades
0 - 8 MHz ATmega128L
0 - 16 MHz ATmega128
8-bit
Microcontroller
with 128K Bytes
In-System
Programmable
Flash
ATmega128
ATmega128L
Note: Not recommended for new
designs.
Rev. 2467S–AVR–07/09
Verzeichnis

ATMEGA128L-8MNR Datenblatt-PDF

ATMEGA128L-8MNR Datenblatt PDF
Microchip
386 Seiten, 6194 KB
ATMEGA128L-8MNR Programmierhandbuch
Microchip
386 Seiten, 6210 KB
ATMEGA128L-8MNR Anderes Datenblatt
Microchip
4 Seiten, 497 KB
ATMEGA128L-8MNR Notizdatei
Microchip
10 Seiten, 289 KB

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