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DSPIC33FJ64GS610-I/PT Programmierhandbuch - Microchip

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DSPIC33FJ64GS610-I/PT Programmierhandbuch

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© 2009 Microchip Technology Inc. DS70152G-page 1
dsPIC33F/PIC24H
1.0 DEVICE OVERVIEW
This document defines the programming specification
for the dsPIC33F 16-bit Digital Signal Controller (DSC)
and PIC24H 16-bit Microcontroller (MCU) families. This
programming specification is required only for those
developing programming support for the dsPIC33F/
PIC24H family. Customers using only one of these
devices should use development tools that already
provide support for device programming.
2.0 PROGRAMMING OVERVIEW
OF THE dsPIC33F/PIC24H
There are two methods of programming the dsPIC33F/
PIC24H family of devices discussed in this
programming specification. They are:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Enhanced In-Circuit Serial Programming
The ICSP programming method is the most direct
method to program the device; however, it is also the
slower of the two methods. It provides native, low-level
programming capability to erase, program and verify
the chip.
The Enhanced ICSP protocol uses a faster method that
takes advantage of the programming executive, as
illustrated in Figure 2-1. The programming executive
provides all the necessary functionality to erase,
program and verify the chip through a small command
set. The command set allows the programmer to
program the dsPIC33F/PIC24H Programming
Specification devices without having to deal with the
low-level programming protocols of the chip.
FIGURE 2-1: PROGRAMMING SYSTEM
OVERVIEW FOR
ENHANCED ICSP™
This specification is divided into major sections that
describe the programming methods independently.
Section 3.0 “Device Programming – Enhanced
ICSP” describes the Enhanced ICSP method.
Section 5.0 “Device Programming – ICSP” describes
the ICSP method.
2.1 Power Requirements
All devices in the dsPIC33F/PIC24H family are dual
voltage supply designs: one supply for the core and
another for the peripherals and I/O pins. A regulator is
provided on-chip to alleviate the need for two external
voltage supplies.
All of the dsPIC33F/PIC24H devices power their core
digital logic at a nominal 2.5V. To simplify system
design, all devices in the dsPIC33F/PIC24H
Programming Specification family incorporate an
on-chip regulator that allows the device to run its core
logic from V
DD.
The regulator provides power to the core from the other
V
DD pins. A low-ESR capacitor (such as tantalum) must
be connected to the V
CAP/VDDCORE pin (Figure 2-2).
This helps to maintain the stability of the regulator. The
specifications for core voltage and capacitance are
listed in Section 8.0 “AC/DC Characteristics and
Timing Requirements”.
FIGURE 2-2: CONNECTIONS FOR THE
ON-CHIP REGULATOR
dsPIC33F/PIC24H
Programmer
Programming
Executive
On-Chip Memory
Note 1: These are typical operating voltages. Refer
to Table 8-1 for the full operating ranges of
V
DD and VCAP/VDDCORE.
2: It is important for the low-ESR capacitor to
be placed as close as possible to the
V
CAP/VDDCORE pin.
VDD
VCAP/VDDCORE
VSS
dsPIC33F/PIC24H
CEFC
3.3V
dsPIC33F/PIC24H Flash Programming Specification
Verzeichnis

DSPIC33FJ64GS610-I/PT Datenblatt-PDF

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DSPIC33FJ64GS610-I/PT Programmierhandbuch
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DSPIC33FJ64GS610-I/PT Anderes Datenblatt
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8 Seiten, 53 KB
DSPIC33FJ64GS610-I/PT Anwendungshinweis
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12 Seiten, 371 KB
DSPIC33FJ64GS610-I/PT Notizdatei
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1 Seiten, 124 KB

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