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®
FN4901.3
ISL5314
Direct Digital Synthesizer
The 14-bit ISL5314 provides a complete Direct Digital
Synthesizer (DDS) system in a single 48 Ld LQFP package.
A 48-bit Programmable Carrier NCO (numerically controlled
oscillator) and a high speed 14-bit DAC (digital-to-analog
converter) are integrated into a stand alone DDS.
The DDS accepts 48-bit center and offset frequency control
information via a parallel processor interface. A 40-bit
frequency tuning word can also be loaded via an asynchronous
serial interface. Modulation control is provided by 3 external
pins. The PH0 and PH1 pins select phase offsets of 0°, 90°,
180° and 270°, while the ENOFR pin enables or zeros the
offset frequency word to the phase accumulator.
The parallel processor interface has an 8-bit write-only data
input C(7:0), a 4-bit address A(3:0) bus, a Write Strobe
(WR), and a Write Enable (WE
). The processor can update
all registers simultaneously by loading a set of master
registers, then transfer all master registers to the slave
registers by asserting the UPDATE
pin.
Block Diagram
Features
• 125MSPS output sample rate with 5V digital supply
• 100MSPS output sample rate with 3.3V digital supply
• 14-bit digital-to-analog (DAC) with internal reference
• Parallel control interface for fast tuning (50MSPS control
register write rate) and serial control interface
• 48-bit programmable frequency control
• Offset frequency register and enable pin for fast FSK
• Small 48 Ld LQFP packaging
• Pb-Free (RoHS compliant)
Applications
• Programmable local oscillator
• FSK, PSK modulation
• Direct digital synthesis
• Clock generation
Pinout
ISL5314
(48 LD LQFP)
TOP VIEW
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL5314INZ ISL5314 INZ -40 to +85 48 Ld LQFP Q48.7x7A
ISL5314EVAL2 25 Evaluation Board
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free
material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. For Moisture Sensitivity Level (MSL), please see device information page for
ISL5314
. For more information on MSL please see techbrief TB363.
SINE
ROM
PHASE
ACCUM.
C(7:0)
RESET
CLK
A(3:0)
UPDATE
ENOFR
PH(1:0)
WR
WE
MASTER
SLAVE
IOUTA
IOUTB
INT
REF
REFIO
REFLO
DAC
14 BIT
COMP1
COMP2
IN-
IN+
COMPOUT
WAVE
CONTROL
MODULATION
∑
+
-
SERIAL
CONTROL
SDATA
SSYNC
SCLK
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
2423222120191817
9
10
11
12
13 14 15 16
33
34
35
36
373839404142434445464748
A2
A3
PH0
PH1
SSYNC
DVDD
SCLK
DGND
DGND
SDATA
DVDD
DGND
C2
C1
C0
ENOFR
DGND
RESET
UPDATE
COMPOUT
REFLO
REFIO
CLK
DVDD
C3
C4
C5
C6
C7
WR
DGND
WE
NC
A0
A1
DVDD
FSADJ
COMP1
AGND
AGND
IOUTB
IOUTA
COMP2
AVDD
AGND
IN+
IN-
AGND
ISL5314
Data Sheet
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2005, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
January 19, 2010
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 2
- ・ Teilenummerierungssystem on Seite 1
- ・ Markierungsinformationen on Seite 1
- ・ Blockdiagramm on Seite 1
- ・ Typisches Anwendungsschaltbild on Seite 3 Seite 5
- ・ Beschreibung der Funktionen on Seite 4
- ・ Technische Daten on Seite 9 Seite 10 Seite 11 Seite 12
- ・ Anwendungsbereich on Seite 1
- ・ Elektrische Spezifikation on Seite 9 Seite 10 Seite 11
