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FN9097.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Dynamic VID™ is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002-2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6556B
Optimized Multi-Phase PWM Controller
with 6-Bit DAC and Programmable
Internal Temperature Compensation for
VR10.X Application
The ISL6556B controls microprocessor core voltage
regulation by driving up to 4 synchronous-rectified buck
channels in parallel. Multi-phase buck converter architecture
uses interleaved timing to multiply channel ripple frequency
and reduce input and output ripple currents.
The ISL6556B utilizes r
DS(ON)
current sensing in each
phase for adaptive voltage positioning (droop), channel-
current balancing, and overcurrent protection. To ensure the
accuracy of droop, a programmable internal temperature
compensation function is implemented to nullify the effect of
r
DS(ON)
temperature sensitivity.
A unity gain, differential amplifier is provided for remote voltage
sensing. Any potential difference between remote and local
grounds can be eliminated using the remote-sense amplifier.
The precision threshold-sensitive enable input is available to
accurately coordinate the startup of the ISL6556B with Intersil
MOSFET driver IC. Dynamic-VID™ technology allows
seamless on-the-fly VID changes. The offset pin allows accurate
voltage offset settings that are independent of VID setting. The
ISL6556B uses 5V bias and has a built-in shunt regulator to
allow 12V bias using only a small external limiting resistor.
Features
• Precision Multi-Phase Core Voltage Regulation
- Differential Remote Voltage Sensing
- 0.5% System Accuracy Over Temperature and Life
- Adjustable Reference-Voltage Offset
• Precision r
DS(ON)
Current Sensing
- Integrated Programmable Temperature Compensation
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Low-Cost, Lossless Current Sensing
• Internal Shunt Regulator for 5V or 12V Biasing
• Microprocessor Voltage Identification Input
- Dynamic VID™ Technology
- 6-Bit VID Input
- 0.8375V to 1.600V in 12.5mV Steps
• Threshold Enable Function for Precision Sequencing
• Overcurrent Protection
• Overvoltage Protection
- No Additional External Components Needed
- OVP Pin to drive optional Crowbar Device
• 2, 3, or 4 Phase Operation up to 1.5MHz per Phase
• QFN Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
• Pb-free Available (RoHS Compliant)
Ordering Information
PART NUMBER TEMP. (°C) PACKAGE PKG. DWG. #
ISL6556BCB* 0 to 70 28 Ld SOIC M28.3
ISL6556BCBZ*
(Note)
0 to 70 28 Ld SOIC (Pb-free) M28.3
ISL6556BCBZA
-T (Note)
0 to 70 28 Ld SOIC Tape and
Reel (Pb-free)
M28.3
ISL6556BCR* 0 to 70 32 Ld 5x5B QFN L32.5x5B
ISL6556BCRZ*
(Note)
0 to 70 32 Ld 5x5B QFN
(Pb-free)
L32.5x5B
* Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Data Sheet December 28, 2004
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Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 9
- ・ Teilenummerierungssystem on Seite 1
- ・ Blockdiagramm on Seite 3 Seite 4
- ・ Typisches Anwendungsschaltbild on Seite 5 Seite 6 Seite 21
- ・ Technische Daten on Seite 8 Seite 15 Seite 17 Seite 20
- ・ Elektrische Spezifikation on Seite 8 Seite 15 Seite 17 Seite 20
