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TIBPAL20R4-25C Programmierhandbuch - TI

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TIBPAL20R4-25C Programmierhandbuch

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TIBPAL20L8-25C, TIBPAL20R4-25C, TIBPAL20R6-25C, TIBPAL20R8-25C
LOW-POWER HIGH-PERFORMANCE IMPACT PAL
CIRCUITS
SRPS022 – D2920, MAY 1987 – REVISED MARCH 1992
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1992, Texas Instruments Incorporated
1
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard
warranty. Production processing does not necessarily include testing of all
parameters.
Low-Power, High-Performance
Reduced I
CC
of 105 mA Max
f
max
:
Without Feedback . . . 33 MHz Min
With Feedback . . . 25 MHz Min
t
pd
. . . 25 ns Max
Direct Replacement for PAL20L8A,
PAL20R4A, PAL20R6A, PAL20L8A, with at
Least 50% Reduction in Power
Preload Capability on Output Registers
Simplifies Testing
Power-Up Clear on Registered Devices (All
Register Outputs are Set Low, but Voltage
Levels at the Output Pins Go High)
Package Options Include Plastic Chip
Carriers in Addition to Plastic and Ceramic
DIPs
Dependable Texas Instruments Quality and
Reliability
DEVICE
I
INPUTS
3-STATE
O OUTPUTS
REGISTERED
Q OUTPUTS
I/O
PORT
S
PAL20L8 14 2 0 6
PAL20R4 12 0 4 (3-state buffers) 4
PAL20R6 12 0 6 (3-state buffers) 2
PAL20R8 12 0 8 (3-state buffers) 0
description
These programmable array logic devices feature
high speed and functional equivalency when
compared with currently available devices. These
IMPACT circuits combine the latest
AdvancedLow-Power Schottky technology with
proven titanium-tungsten fuses to provide reliable,
high-performance substitutes for conventional
TTL logic. Their easy programmability allows forquick design of custom functions and typically results in a more
compact circuit board. In addition, chip carriers are available for futher reduction in board space.
All of the register outputs are set to a low level during power-up. Extra circuitry has been provided to allow loading
of each register asynchronously to either a high or low state. This feature simplifies testing because the registers
can be set to an initial state prior to executing the test sequence.
The TIBPAL20’ C series is characterized from 0°C to 75°C.
These devices are covered by U.S. Patent 4,410,987
IMPACT is a trademark of Texas Instruments Incorporated.
PAL is a registered trademark of Advanced Micro Devices Inc.
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24
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13
I
I
I
I
I
I
I
I
I
I
I
GND
V
CC
I
O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
TIBPAL20L8’
JT OR NT PACKAGE
(TOP VIEW)
3212827
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
I
I
I
NC
I
I
I
426
14 15 16 1718
I
I
GND
NC
I
I
O
I
I
I
NC
I
O
TIBPAL20L8’
FN PACKAGE
(TOP VIEW)
NC
No internal connection
Pin assignments in operating mode
V
CC
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