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1V/div
500mV/div
Time(1ms/div)
C =0 F
SS
m
C =0.001 F
SS
m
C =0.0047 F
SS
m
V
OUT
V
EN
0V
1.1V
TPS74401
GND
EN
FB
IN PG
SS
OUT
V
IN
V
OUT
V
PG
R
1
R
2
R_pullup
C
OUT
Optional
C
IN
1 Fm
C
SS
V
BIAS
C
BIAS
1 Fm
BIAS
ADJUSTABLE VOLTAGE VERSION
FIXED VOLTAGE VERSION
TPS744xx
GND
EN
SNS
IN PG
SS
OUT
V
IN
V
OUT
V
PG
C
OUT
Optional
C
IN
1 Fm
C
SS
V
BIAS
C
BIAS
1 Fm
BIAS
R_pullup
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Reference
Design
TPS74401
SBVS066Q –DECEMBER 2005–REVISED APRIL 2015
TPS74401 3.0-A, Ultra-LDO with Programmable Soft-Start
1 Features 3 Description
The TPS74401 low-dropout (LDO) linear regulators
1
• Input Voltage Range: 1.1 V to 5.5 V
provide an easy-to-use robust power-management
• Soft-Start (SS) Pin Provides a Linear Startup With
solution for a wide variety of applications. The user-
Ramp Time Set by External Capacitor
programmable soft-start minimizes stress on the input
• 1% Accuracy Over Line, Load, and Temperature
power source by reducing capacitive inrush current
on start-up. The soft-start is monotonic and well-
• Supports Input Voltages as Low as 0.9 V With
suited for powering many different types of
External Bias Supply
processors and application-specific integrated circuits
• Adjustable Output: 0.8 V to 3.6 V
(ASICs). The enable input and power-good output
• Ultra-Low Dropout: 115 mV at 3.0 A (typical)
allow easy sequencing with external regulators. This
complete flexibility lets the user configure a solution
• Stable With Any or No Output Capacitor
that meets the sequencing requirements of field-
• Excellent Transient Response
programmable gate arrays (FPGAs), digital signal
• Open-Drain Power-Good (VQFN Only)
processors (DSPs), and other applications with
specific start-up requirements.
• Available in 5-mm × 5-mm × 1-mm VQFN and
DDPAK-7 Packages
A precision reference and error amplifier deliver 1%
accuracy over load, line, temperature, and process.
2 Applications
The TPS74401 family of LDOs is stable without an
output capacitor or with ceramic output capacitors.
• FPGA Applications
The device family is fully specified from T
J
= –40°C to
• DSP Core and I/O Voltages
125°C. The TPS74401 is offered in a small (5-mm ×
• Post-Regulation Applications
5-mm) VQFN package, yielding a highly compact
total solution size. For applications that require
• Applications With Special Start-Up Time or
additional power dissipation, the DDPAK (KTW)
Sequencing Requirements
package is also available.
• Hot-Swap and Inrush Controls
Device Information
(1)
Typical Application Circuits
PART NUMBER PACKAGE BODY SIZE (NOM)
TO-263 (7) 10.10 mm × 8.89 mm
TPS74401
VQFN (20) 5.00 mm × 5.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Turn-On Response
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 4
- ・ Abmessungen des Paketumrisses on Seite 31 Seite 33 Seite 34
- ・ Markierungsinformationen on Seite 31 Seite 32
- ・ Blockdiagramm on Seite 13 Seite 14 Seite 24 Seite 25 Seite 26
- ・ Typisches Anwendungsschaltbild on Seite 1 Seite 20 Seite 24 Seite 25
- ・ Technische Daten on Seite 5
- ・ Anwendungsbereich on Seite 1 Seite 20 Seite 32
- ・ Elektrische Spezifikation on Seite 6 Seite 7
