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12-Bit R/D Converter
with Reference Oscillator
AD2S1200
Rev. 0
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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Tel: 781.329.4700 www.analog.com
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FEATURES
Complete monolithic R/D converter
Parallel and serial 12-bit data ports
System fault detection
Absolute position and velocity outputs
Differential inputs
±11 arc minutes of accuracy
1,000 rps maximum tracking rate, 12-bit resolution
Incremental encoder emulation (1,024 pulses/rev)
Programmable sinusoidal oscillator on-board
Compatible with DSP and SPI® interface standards
204.8 kHz square wave output
Single-supply operation (5.00 V ± 5%)
−40°C to +125°C temperature rating
44-lead LQFP package
4 kV ESD protection
GENERAL DESCRIPTION
The AD2S1200 is a complete 12-bit resolution tracking resolver-
to-digital converter, integrating an on-board programmable
sinusoidal oscillator that provides sine wave excitation for
resolvers. An external 8.192 MHz crystal is required to provide
a precision time reference. This clock is internally divided to
generate a 4.096 MHz clock to drive all the peripherals.
The converter accepts 3.6 V p-p ± 10% input signals, in the
range of 10 kHz to 20 kHz on the Sin and Cos inputs. A Type II
servo loop is employed to track the inputs and convert the input
Sin and Cos information into a digital representation of the
input angle and velocity. The bandwidth of the converter is set
internally to 1.7 kHz with an external 8.192 MHz crystal. The
maximum tracking rate is 1,000 rps.
FUNCTIONAL BLOCK DIAGRAM
04406-0-001
REFERENCE
OSCILLATOR
(DAC)
ADC
SinLO
Sin
ANGLE θ
ANGLE φ
ADC
CosLO
Cos
EXC
EXC
A
B
NM
SAMPLE
MONITOR
ERROR
MONITOR
(204.8kHz)
CPO
REFBYP REFOUT FS1 FS2 XTALOUT
CLKIN
(8.192MHz)
DOS
LOT
DIR
(4.096MHz)
ERROR
ERROR
CALCULATION/
SIGNAL
MONITOR
DEMODULATOR
CS
RD
POSITION
INTEGRATOR
POSITION REGISTER
MULTIPLEXER
DB11
SO
SOERDVELRESET DB10
SCLK
DB9–DB0
AD2S1200
DATA BUS OUTPUT
VELOCITY REGISTER
ENCODER
EMULATION
SYNTHETIC
REFERENCE
VOLTAGE
REFERENCE
INTERNAL
CLOCK
GENERATOR
CLOCK
DIVIDER
FAULT
INDICATORS
DIGITAL
FILTER
VELOCITY
INTEGRATOR
Figure 1.
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 7
- ・ Abmessungen des Paketumrisses on Seite 21
- ・ Teilenummerierungssystem on Seite 21
- ・ Blockdiagramm on Seite 1 Seite 18
- ・ Beschreibung der Funktionen on Seite 1 Seite 7
- ・ Technische Daten on Seite 1 Seite 4 Seite 6
- ・ Anwendungsbereich on Seite 2
- ・ Elektrische Spezifikation on Seite 5
