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LTC2654
1
2654f
BLOCK DIAGRAM
DESCRIPTION
Quad 16-/12-Bit Rail-to-Rail
DACs with 10ppm/°C
Max Reference
The LTC
®
2654 is a family of quad 16-/12-bit rail-to-rail
DACs with integrated 10ppm/°C maximum reference . The
DACs have built-in high performance, rail-to-rail, output
buffers and are guaranteed monotonic. The LTC2654-L
has a full-scale output of 2.5V with the integrated refer-
ence and operates from a single 2.7V to 5.5V supply.
The LTC2654-H has a full-scale output of 4.096V with
the integrated reference and operates from a 4.5V to
5.5V supply. Each DAC can also operate with an external
reference, which sets the full-scale output to 2 times the
external reference voltage.
These DACs communicate via a SPI/MICROWIRE compat-
ible 4-wire serial interface which operates at clock rates
up to 50MHz. The LTC2654 incorporates a power-on reset
circuit that is controlled by the PORSEL pin. If PORSEL
is tied to GND the DACs reset to zero-scale. If PORSEL is
tied to V
CC
, the DACs reset to mid-scale.
FEATURES
APPLICATIONS
n
Precision Reference 10ppm/°C Max
n
Maximum INL Error: ±4LSB at 16-Bits
n
Low ±2mV (Max) Offset Error
n
Guaranteed Monotonic Over Temperature
n
Selectable Internal or External Reference
n
2.7V to 5.5V Supply Range (LTC2654-L)
n
Integrated Reference Buffers
n
Ultralow Crosstalk Between DACs (<3nV•s)
n
Power-on-Reset to Zero-Scale/Mid-Scale
n
Asynchronous DAC Update Pin
n
Tiny 20-Lead 4mm × 4mm QFN and 16-Lead Narrow
SSOP Packages
n
Mobile Communications
n
Process Control and Industrial Automation
n
Instrumentation
n
Automatic Test Equipment
n
Automotive
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5396245, 6891433 and patent pending.
INL Curve
CODE
128
INL (LSB)
4
2
3
1
0
–2
–1
–3
–4
16384 49152
2654 TA01b
6553532768
V
CC
= 5V
2654 TA01a
GND
V
OUTA
V
OUTB
SCK
CS/LD
LDAC
REFLO
REFIN/OUT
REFCOMP
V
CC
V
OUTD
V
OUTC
PORSEL
SDO
SDI
CLR
INTERNAL REFERENCE
DAC A
CONTROL LOGIC
DECODE
POWER-ON
RESET
DAC B
DAC D
DAC C
REGISTER
32-BIT SHIFT REGISTER
REGISTER
REGISTERREGISTER
REGISTERREGISTER
REGISTERREGISTER
Verzeichnis
- ・ Konfiguration des Pinbelegungsdiagramms on Seite 14
- ・ Abmessungen des Paketumrisses on Seite 23
- ・ Paket-Footprint-Pad-Layout on Seite 22
- ・ Teilenummerierungssystem on Seite 4
- ・ Markierungsinformationen on Seite 4
- ・ Blockdiagramm on Seite 1 Seite 15
- ・ Typisches Anwendungsschaltbild on Seite 24
- ・ Technische Daten on Seite 8 Seite 16
- ・ Anwendungsbereich on Seite 1
- ・ Elektrische Spezifikation on Seite 4 Seite 5 Seite 6 Seite 7 Seite 8
