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CY8C21312, CY8C21512
Automotive PSoC
®
Programmable System-on-Chip™
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 •408-943-2600
Document Number: 001-63745 Rev. *D Revised November 4, 2014
Features
■ Automotive Electronics Council (AEC) Q100 qualified
■ Powerful Harvard-architecture processor
❐ M8C processor speeds up to 24 MHz
❐ Low power at high speed
❐ Operating voltage: 3.0 V to 5.25 V
❐ Automotive temperature range: –40 C to +85 C
■ Advanced peripherals
❐ One CapSense
®
block:
• Provides configurable capacitive sensing elements
• Supports combination of CapSense buttons, sliders,
touchpads, and proximity sensors
❐ One limited digital PSoC
®
block provides:
• 8-bit timer, counter, or pulse-width modulator (PWM)
• Half-duplex UART
• SPI slave
• Connectable to all general purpose I/O (GPIO) pins
■ Flexible on-chip memory
❐ 8 KB flash program storage
❐ 512 bytes SRAM data storage
❐ In-system serial programming (ISSP)
❐ Partial flash updates
❐ Flexible protection modes
❐ EEPROM emulation in flash
■ Complete development tools
❐ Free development software (PSoC Designer™)
❐ Full-featured in-circuit emulator (ICE) and programmer
❐ Full-speed emulation
❐ Complex breakpoint structure
❐ 128 KB trace memory
■ Precision, programmable clocking
❐ Internal ±5% 24 MHz oscillator
❐ Internal low-speed, low-power oscillator for Watchdog and
Sleep functionality
❐ Optional external oscillator, up to 24 MHz
■ Programmable pin configurations
❐ 25 mA sink, 10 mA drive on all GPIOs
❐ Pull-up, pull-down, high Z, strong, or open drain drive modes
on all GPIOs
❐ Analog input on all GPIOs
❐ Configurable interrupt on all GPIOs
■ Versatile analog mux
❐ Common internal analog bus
❐ Simultaneous connection of I/O combinations
■ Additional system resources
❐ Inter-Integrated Circuit (I
2
C™) master, slave, or multi-master
operation up to 400 kHz
❐ Watchdog and sleep timers
❐ User-configurable low-voltage detection (LVD)
❐ Integrated supervisory circuit
❐ On-chip precision voltage reference
Logic Block Diagram
POR and LVD
System Resets
DIGITAL SYSTEM
SRAM
512B
Interrupt
Controller
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
Global Digital
Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM Flash 8K
Internal
Voltage
Ref.
Digital
Clocks
SYSTEM RESOURCES
ANALOG SYSTEM
I
2
C
System Bus
Port 2 Port 1 Port 0Port 3
Digital Block
CapSense Block
Analog
Resources
Digital
Resources
Analog Input
Muxing
Verzeichnis
